Track fitting on GPUs (and FPGAs)
Track fitting
A track fit refers to the process of reconstructing the trajectory of a charged particle from measurements recorded by particle (tracking) detectors.
The detectors capture information such as the position and energy of the particle at various points along its path.
The track fitting algorithm analyzes this data to determine the most probable trajectory the particle followed as it traversed the detector.
This reconstructed track is essential for understanding the properties of the particles involved, including their type, momentum, and the location where they were produced.
For the ATLAS Event Filter system, we currently investigate two different algorithms and their performance on hardware accelerators.
General Triplet Fit
The General Triplet Fit is a new, parallelizable track fitting algorithm . It is an extension of the Multiple-Scattering-only Triplet Fit developed for the Mu3e experiment,
by including hit uncertainties in the calculations.
This is essential because, at high particle momenta, uncertainties in the measured position of the hits become the predominant source of uncertainty in determining particle momenta.
The fitting process operates on sets of three hits (triplets), and forms tracks by combining triplets with shared hits.
Implementations on CPU, GPUs and AMD FPGAs are currently under development.
What you learn:
Requires coding in C++ in general, CUDA for Nvidia GPUs, HLS for FPGAs. Additionally Git for version control (collaborating between developers), Python (mostly for data visualization).
Linearized Chi^2 Track Fit
The linearized Chi^2 track fit builds on top of a Principal Component Analysis (PCA) algorithm to determine the track parameters for a given set of clusters.
A specific PCA is only applicable within a small detector region, referred to as a sector.
The minimization of the distance between the expected and real track parameters in the PCA follows a Chi^2-distribution,
allowing the use of the Chi^2-variable to evaluate the track quality, and remove bad candidates before the actual evaluation of the track parameters.
This method, originally intended to be used for the Hardware Track Trigger project, has been successfully implemented on an FPGA.
Its implementation on Nvidia GPUs is currently under way.