** Circuit Description 741 **
*from http://www.macs.ee.mcgill.ca/~roberts/SPICE/Welcome1.html
*made consistent with Horowitz fig.3.27, p.104
* CONNECTIONS:   NON-INVERTING INPUT
*                | INVERTING INPUT
*                | | POSITIVE POWER SUPPLY
*                | | | NEGATIVE POWER SUPPLY
*                | | | | OUTPUT
*                | | | | |
.subckt opamp741 1 2 3 4 5 
* power supplies 
*Vcc 3 0 DC +15V 
*Vee 4 0 DC -15V 
* differential-mode signal level 
*Vd 101 0 DC 0V 
*Rd 101 0 1
*EV+ 1 100 101 0 +0.5
*EV- 2 100 101 0 -0.5
* common-mode signal level
*Vcm 100 0 DC 0V 
* 1st or input stage 
Q1 34 1 12 npn
Q2 34 2 13 npn
Q3 7 33 12 pnp
Q4 8 33 13 pnp
Q5 7 9 10 npn
Q6 8 9 11 npn
Q7 3 7 9 npn
Q8 34 34 3 pnp
Q9 33 34 3 pnp
R1 10 4 1k 
R2 11 4 1k 
R3 9 4 50k 
* 2nd stage 
Q13B 16 6 3 pnp 0.75 
Q16 3 8 14 npn 
Q17 16 14 15 npn 
R8 15 4 100
R9 14 4 50k
Cc 8 16 30p
* output or buffer stage
Q13A 17 6 3 pnp 0.25
Q14 3 17 23 npn 3
Q18 17 17 18 npn
Q19 17 18 19 npn
Q20 4 19 21 pnp 3
Q22A 4 16 19 pnp
Q22B 4 16 8 pnp
R6 5 23 27
R7 21 5 27
R10 18 19 40k
* short-circuit protection circuitry
Q15 17 23 5 npn
Q21 20 21 5 pnp
Q23 8 20 4 npn
Q24 20 20 4 npn
R11 20 4 50k
* biasing stage
Q10 33 35 24 npn
Q11 35 35 4 npn
Q12 6 6 3 pnp
R4 24 4 5k
R5 6 35 39k
* transistor model statements
.model npn NPN ( Bf=200 Br=2.0 VAf=125V Is=10fA Tf=0.35ns
+ Rb=200 Rc=200 Re=2 Cje=1.0pF Vje=0.70V Mje=0.33 Cjc=0.3pF
+ Vjc=0.55V Mjc=0.5 Cjs=3.0pF Vjs=0.52V Mjs=0.5)
.model pnp PNP ( Bf=50 Br=4.0 VAf=50V Is=10fA Tf=30ns
+ Rb=300 Rc=100 Re=10 Cje=0.3pF Vje=0.55V Mje=0.5 Cjc=1.0pF
+ Vjc=0.55V Mjc=0.5 Cjs=3.0pF Vjs=0.52V Mjs=0.5)
.ends





